A Technique for Improving Wireability in Automated Circuit Card Place- ments.

by R. L. Clark

Purchase Print Copy

 FormatList Price Price
Add to Cart Paperback $20.00 $16.00 20% Web Discount

Documentation of an algorithm for automatically placing electronic components on printed circuit cards so as to minimize wiring congestion. Previous methods have sought to position the components to minimize the total wire length, whereas the new method considers only the anticipated degree of congestion in deciding between two trial placements. Implementation of a simplified version at IBM General Products Division resulted in a "surprising" reduction in the number of unwired nets. The technique was developed assuming use of the associated routing program, which attempts to route all nets via minimal paths before resorting to a maze-running approach. 16 pp. Refs. (MW)

This report is part of the RAND Corporation Paper series. The paper was a product of the RAND Corporation from 1948 to 2003 that captured speeches, memorials, and derivative research, usually prepared on authors' own time and meant to be the scholarly or scientific contribution of individual authors to their professional fields. Papers were less formal than reports and did not require rigorous peer review.

The RAND Corporation is a nonprofit institution that helps improve policy and decisionmaking through research and analysis. RAND's publications do not necessarily reflect the opinions of its research clients and sponsors.